Propagation Delay in Circuit Formula

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Circuit Propagation Delay refers to the rise time or fall time in logic gates. This is the time it takes for a logic gate to change its output state based on a change in the input state. Check FAQs
tckt=tpHL+tpLH2
tckt - Circuit Propagation Delay?tpHL - Propagation Delay High to Low?tpLH - Propagation Delay Low to High?

Propagation Delay in Circuit Example

With values
With units
Only example

Here is how the Propagation Delay in Circuit equation looks like with Values.

Here is how the Propagation Delay in Circuit equation looks like with Units.

Here is how the Propagation Delay in Circuit equation looks like.

8.16Edit=7Edit+9.32Edit2
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Propagation Delay in Circuit Solution

Follow our step by step solution on how to calculate Propagation Delay in Circuit?

FIRST Step Consider the formula
tckt=tpHL+tpLH2
Next Step Substitute values of Variables
tckt=7ns+9.32ns2
Next Step Convert Units
tckt=7E-9s+9.3E-9s2
Next Step Prepare to Evaluate
tckt=7E-9+9.3E-92
Next Step Evaluate
tckt=8.16E-09s
LAST Step Convert to Output's Unit
tckt=8.16ns

Propagation Delay in Circuit Formula Elements

Variables
Circuit Propagation Delay
Circuit Propagation Delay refers to the rise time or fall time in logic gates. This is the time it takes for a logic gate to change its output state based on a change in the input state.
Symbol: tckt
Measurement: TimeUnit: ns
Note: Value should be greater than 0.
Propagation Delay High to Low
Propagation Delay high to low is the time required for the output signal to change from its high level to its low level as a consequence of an input signal change.
Symbol: tpHL
Measurement: TimeUnit: ns
Note: Value should be greater than 0.
Propagation Delay Low to High
Propagation Delay low to high is the time required for the output signal to change from its low level to its high level as a consequence of an input signal change.
Symbol: tpLH
Measurement: TimeUnit: ns
Note: Value should be greater than 0.

Other formulas in CMOS Delay Characteristics category

​Go Edge Rate
te=tr+tf2
​Go Fall Time
tf=2te-tr
​Go Rise Time
tr=2te-tf
​Go Normalized Delay
d=tpdtc

How to Evaluate Propagation Delay in Circuit?

Propagation Delay in Circuit evaluator uses Circuit Propagation Delay = (Propagation Delay High to Low+Propagation Delay Low to High)/2 to evaluate the Circuit Propagation Delay, The Propagation Delay in Circuit is propagation delay is defined as the amount of time required after an input signal is applied and has stabilized to the input of a circuit to the time that the output of the circuit has stabilized to the correct output signal. Circuit Propagation Delay is denoted by tckt symbol.

How to evaluate Propagation Delay in Circuit using this online evaluator? To use this online evaluator for Propagation Delay in Circuit, enter Propagation Delay High to Low (tpHL) & Propagation Delay Low to High (tpLH) and hit the calculate button.

FAQs on Propagation Delay in Circuit

What is the formula to find Propagation Delay in Circuit?
The formula of Propagation Delay in Circuit is expressed as Circuit Propagation Delay = (Propagation Delay High to Low+Propagation Delay Low to High)/2. Here is an example- 8.2E+9 = (7E-09+9.32E-09)/2.
How to calculate Propagation Delay in Circuit?
With Propagation Delay High to Low (tpHL) & Propagation Delay Low to High (tpLH) we can find Propagation Delay in Circuit using the formula - Circuit Propagation Delay = (Propagation Delay High to Low+Propagation Delay Low to High)/2.
Can the Propagation Delay in Circuit be negative?
No, the Propagation Delay in Circuit, measured in Time cannot be negative.
Which unit is used to measure Propagation Delay in Circuit?
Propagation Delay in Circuit is usually measured using the Nanosecond[ns] for Time. Second[ns], Millisecond[ns], Microsecond[ns] are the few other units in which Propagation Delay in Circuit can be measured.
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