Multiplexer Delay Formula

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Multiplexer Delay is the propagation delay of the multiplexer. It exhibits a minimum number of pmos and nmos, minimum delay, and minimum power dissipation. Check FAQs
tmux=Tskip-(tpg+(2(n-1)Tao)-Txor)K-1
tmux - Multiplexer Delay?Tskip - Carry-Skip Adder Delay?tpg - Propagation Delay?n - N-Input AND Gate?Tao - AND-OR Gate Delay?Txor - XOR Delay?K - K-Input AND Gate?

Multiplexer Delay Example

With values
With units
Only example

Here is how the Multiplexer Delay equation looks like with Values.

Here is how the Multiplexer Delay equation looks like with Units.

Here is how the Multiplexer Delay equation looks like.

3.9467Edit=34.3Edit-(8.01Edit+(2(2Edit-1)2.05Edit)-1.49Edit)7Edit-1
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Multiplexer Delay Solution

Follow our step by step solution on how to calculate Multiplexer Delay?

FIRST Step Consider the formula
tmux=Tskip-(tpg+(2(n-1)Tao)-Txor)K-1
Next Step Substitute values of Variables
tmux=34.3ns-(8.01ns+(2(2-1)2.05ns)-1.49ns)7-1
Next Step Convert Units
tmux=3.4E-8s-(8E-9s+(2(2-1)2.1E-9s)-1.5E-9s)7-1
Next Step Prepare to Evaluate
tmux=3.4E-8-(8E-9+(2(2-1)2.1E-9)-1.5E-9)7-1
Next Step Evaluate
tmux=3.94666666666667E-09s
Next Step Convert to Output's Unit
tmux=3.94666666666667ns
LAST Step Rounding Answer
tmux=3.9467ns

Multiplexer Delay Formula Elements

Variables
Multiplexer Delay
Multiplexer Delay is the propagation delay of the multiplexer. It exhibits a minimum number of pmos and nmos, minimum delay, and minimum power dissipation.
Symbol: tmux
Measurement: TimeUnit: ns
Note: Value should be greater than 0.
Carry-Skip Adder Delay
Carry-Skip Adder Delay the critical path of CPAs considered so far involves a gate or transistor for each bit of the adder, which can be slow for large adders.
Symbol: Tskip
Measurement: TimeUnit: ns
Note: Value should be greater than 0.
Propagation Delay
Propagation delay typically refers to the rise time or fall time in logic gates. This is the time it takes for a logic gate to change its output state based on a change in the input state.
Symbol: tpg
Measurement: TimeUnit: ns
Note: Value should be greater than 0.
N-Input AND Gate
N-input AND gate is defined as the number of inputs in the AND logic gate for the desirable output.
Symbol: n
Measurement: NAUnit: Unitless
Note: Value should be greater than 0.
AND-OR Gate Delay
AND-OR Gate Delay in the gray cell is defined as the delay in the computing time in AND/OR gate when logic is passed through it.
Symbol: Tao
Measurement: TimeUnit: ns
Note: Value should be greater than 0.
XOR Delay
XOR Delay is the propagation delay of XOR gate.
Symbol: Txor
Measurement: TimeUnit: ns
Note: Value should be greater than 0.
K-Input AND Gate
K-input AND gate is defined as the kth input in the AND gate among the logical gates.
Symbol: K
Measurement: NAUnit: Unitless
Note: Value should be greater than 0.

Other formulas in Array Datapath Subsystem category

​Go Ground Capacitance
Cgnd=(VagrCadjVtm)-Cadj
​Go Carry-Ripple Adder Critical Path Delay
Tripple=tpg+(Ngates-1)Tao+Txor

How to Evaluate Multiplexer Delay?

Multiplexer Delay evaluator uses Multiplexer Delay = (Carry-Skip Adder Delay-(Propagation Delay+(2*(N-Input AND Gate-1)*AND-OR Gate Delay)-XOR Delay))/(K-Input AND Gate-1) to evaluate the Multiplexer Delay, The Multiplexer Delay formula is defined as the data to output propagation delay in these multiplexers is too long primarily due to the relatively large amount of capacitance associated with the collector(s). Multiplexer Delay is denoted by tmux symbol.

How to evaluate Multiplexer Delay using this online evaluator? To use this online evaluator for Multiplexer Delay, enter Carry-Skip Adder Delay (Tskip), Propagation Delay (tpg), N-Input AND Gate (n), AND-OR Gate Delay (Tao), XOR Delay (Txor) & K-Input AND Gate (K) and hit the calculate button.

FAQs on Multiplexer Delay

What is the formula to find Multiplexer Delay?
The formula of Multiplexer Delay is expressed as Multiplexer Delay = (Carry-Skip Adder Delay-(Propagation Delay+(2*(N-Input AND Gate-1)*AND-OR Gate Delay)-XOR Delay))/(K-Input AND Gate-1). Here is an example- 4E+9 = (3.43E-08-(8.01E-09+(2*(2-1)*2.05E-09)-1.49E-09))/(7-1).
How to calculate Multiplexer Delay?
With Carry-Skip Adder Delay (Tskip), Propagation Delay (tpg), N-Input AND Gate (n), AND-OR Gate Delay (Tao), XOR Delay (Txor) & K-Input AND Gate (K) we can find Multiplexer Delay using the formula - Multiplexer Delay = (Carry-Skip Adder Delay-(Propagation Delay+(2*(N-Input AND Gate-1)*AND-OR Gate Delay)-XOR Delay))/(K-Input AND Gate-1).
Can the Multiplexer Delay be negative?
No, the Multiplexer Delay, measured in Time cannot be negative.
Which unit is used to measure Multiplexer Delay?
Multiplexer Delay is usually measured using the Nanosecond[ns] for Time. Second[ns], Millisecond[ns], Microsecond[ns] are the few other units in which Multiplexer Delay can be measured.
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