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Hold Time at High logic Formula

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Hold Time at High logic is defined as the hold time during the input when the logic goes high to 1 or high output. Check FAQs

T hold1 = t af - T setup0

T_hold1 - Hold Time at High Logic?t_af - Aperture Time for Falling Input?T_setup0 - Setup Time at Low Logic?

Hold Time at High logic Example

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With units

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Here is how the Hold Time at High logic equation looks like with Values.

Here is how the Hold Time at High logic equation looks like with Units.

Here is how the Hold Time at High logic equation looks like.

7.9 = 11.65 - 3.75

7.9ns = 11.65ns - 3.75ns

7.9 = 11.65 - 3.75

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Hold Time at High logic Solution

Follow our step by step solution on how to calculate Hold Time at High logic?

FIRST Step Consider the formula

T hold1 = t af - T setup0

Next Step Substitute values of Variables

∴

T hold1 = 11.65ns - 3.75ns

Next Step Convert Units

∴

T hold1 = 1.2E-8s - 3.8E-9s

Next Step Prepare to Evaluate

∴

T hold1 = 1.2E-8 - 3.8E-9

Next Step Evaluate

∴

T hold1 = 7.9E-09s

LAST Step Convert to Output's Unit

∴

T hold1 = 7.9ns

Hold Time at High logic Formula Elements

Variables

Hold Time at High Logic

Hold Time at High logic is defined as the hold time during the input when the logic goes high to 1 or high output.

Symbol: T_hold1

Measurement: TimeUnit: ns

Note: Value should be greater than 0.

Formulas to find Hold Time at High Logic

Aperture Time for Falling Input

Aperture Time for Falling Input is defined as the time during the input when the logic falls to 0 or low output.

Symbol: t_af

Measurement: TimeUnit: ns

Note: Value should be greater than 0.

Formulas to find Aperture Time for Falling Input

Setup Time at Low Logic

Setup Time at Low Logic is defined as the setup time when the logic falls to low input or 0.

Symbol: T_setup0

Measurement: TimeUnit: ns

Note: Value should be greater than 0.

Formulas to find Setup Time at Low Logic

Other formulas in CMOS Time Characteristics category

Go Aperture Time for Rising Input

t ar = T setup1 + T hold0

Go Aperture Time for Falling Input

t af = T setup0 + T hold1

Go Setup Time at High Logic

T setup1 = t ar - T hold0

Go Setup Time at Low Logic

T setup0 = t af - T hold1

How to Evaluate Hold Time at High logic?

Hold Time at High logic evaluator uses Hold Time at High Logic = Aperture Time for Falling Input-Setup Time at Low Logic to evaluate the Hold Time at High Logic, The Hold Time at High logic formula is defined as the hold time during the input when the logic goes high to 1 or high output. Hold Time at High Logic is denoted by T_hold1 symbol.

How to evaluate Hold Time at High logic using this online evaluator? To use this online evaluator for Hold Time at High logic, enter Aperture Time for Falling Input (t_af) & Setup Time at Low Logic (T_setup0) and hit the calculate button.

FAQs on Hold Time at High logic

What is the formula to find Hold Time at High logic?

The formula of Hold Time at High logic is expressed as Hold Time at High Logic = Aperture Time for Falling Input-Setup Time at Low Logic. Here is an example- 7.3E+9 = 1.165E-08-3.75E-09.

How to calculate Hold Time at High logic?

With Aperture Time for Falling Input (t_af) & Setup Time at Low Logic (T_setup0) we can find Hold Time at High logic using the formula - Hold Time at High Logic = Aperture Time for Falling Input-Setup Time at Low Logic.

Can the Hold Time at High logic be negative?

No, the Hold Time at High logic, measured in Time cannot be negative.

Which unit is used to measure Hold Time at High logic?

Hold Time at High logic is usually measured using the Nanosecond[ns] for Time. Second[ns], Millisecond[ns], Microsecond[ns] are the few other units in which Hold Time at High logic can be measured.

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Hold Time at High logic Formula

Hold Time at High logic Example

Hold Time at High logic Solution

Hold Time at High logic Formula Elements

Other formulas in CMOS Time Characteristics category

How to Evaluate Hold Time at High logic?

FAQs on Hold Time at High logic

Variable Name