Drain Current in Saturation Region of PMOS Transistor evaluator uses Saturation Drain Current = 1/2*Process Transconductance Parameter in PMOS*Aspect Ratio*(Voltage between Gate and Source-modulus(Threshold Voltage))^2 to evaluate the Saturation Drain Current, The Drain Current in Saturation Region of PMOS Transistor drain current first increases linearly with the applied drain-to-source voltage, but then reaches a maximum value. A depletion layer located at the drain end of the gate accommodates the additional drain-to-source voltage. This behavior is referred to as drain current saturation. Saturation Drain Current is denoted by Ids symbol.
How to evaluate Drain Current in Saturation Region of PMOS Transistor using this online evaluator? To use this online evaluator for Drain Current in Saturation Region of PMOS Transistor, enter Process Transconductance Parameter in PMOS (k'p), Aspect Ratio (WL), Voltage between Gate and Source (VGS) & Threshold Voltage (VT) and hit the calculate button.